1. Field of the Invention
The present application relates to a display device and, more particularly, to a display device and a driving method thereof.
2. Discussion of the Related Art
Display devices have typically used cathode-ray tubes (CRT). Presently, much effort has been made to study and develop various types of flat panel displays, such as liquid crystal display (LCD) devices, plasma display panels (PDP), field emission displays, and electro-luminescence displays (ELD), as alternatives to CRT. In particular, the LCD devices have been widely used. The LCD devices provide several advantages, such as high resolution, light weight, thin profile, compact size, and low power supply requirements.
In general, an LCD device includes two substrates that are spaced apart and face each other with a liquid crystal material interposed between the two substrates. The two substrates include electrodes that face each other such that a voltage applied between the electrodes induces an electric field across the liquid crystal material. The light transmissivity of the LCD device can be changed by adjusting the intensity of the induced electric field to change an alignment of the liquid crystal molecules in the liquid crystal material. Thus, the LCD device displays images by varying the intensity of the induced electric field.
The LCD device is supplied with data signals and control signals from an external system. The LCD device may be categorized into a digital type and an analog type whether the externally provided data signals are in a digital or analog form.
FIG. 1 is a block diagram of an analog type LCD device of the related art, FIG. 2 is a schematic view of a liquid crystal panel shown in FIG. 1, and FIG. 3 is a block diagram of the related art main operating clock generating portion interfacing the timing controller circuit shown in FIG. 1. Referring to FIGS. 1 to 3, the related art LCD device 1 includes a liquid crystal panel 2 and a driving circuit portion 26. The driving circuit portion 26 includes a printed circuit board (PCB) (not shown).
An decoder 16 is supplied with data signals of analog form including red (R), green (G) and blue (B) data signals, and a synchronization signal Csync, from an external system, such as a personal computer. The data signals are synchronized by the reference synchronization signal (Csync) and inputted to the decoder 16. The decoder 16 decodes and transfers the data signals according to the control signals supplied thereto.
The liquid crystal panel 2 includes a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm. The gate lines GL1 to GLn and the data lines DL1 to DLm cross each other to define a plurality of pixel regions. A thin film transistor TFT and a liquid crystal capacitor CLC are formed in each pixel region. The liquid crystal capacitor CLC includes a pixel electrode (not shown), a common electrode (not shown), and a liquid crystal layer (not shown) between the pixel and common electrodes.
The timing controller 12 supplies control signals to the decoder 16 and data and gate drivers 18 and 20 to operate the decoder 16 and the gate and data drivers 18 and 20.
The data driver 18 transfers the data signals the data lines DL1 to DLm according to the control signals supplied thereto.
The gate driver 20 sequentially outputs gate voltages to the gate lines GL1 to GLn to enable the gate lines GL1 to GLn sequentially. Each of the gate lines GL1 to GLn is enabled during one horizontal period. The thin film transistor TFT is turned on and off according to on and off states of the gate voltage. While the thin film transistor TFT is turned on, the data voltage is supplied to the liquid crystal capacitor CLC.
A power generator 14 supplies power required for the components of the driving circuit portion 26 and supplies a common voltage for the common electrode.
The driving circuit portion 26 further includes a main operating clock generating portion 13. The timing controller 12 generates the control signals using a main operating clock (Mclk).
The main operating clock generating portion 13 generates the main operating clock Mclk having a fixed frequency. Accordingly, the related art LCD device can only driven in a specific operating mode corresponding to the fixed frequency of the main operating clock Mclk. In other words, the related art LCD device is not compatible with other operating modes requiring different frequencies of the main operating clock Mclk. For example, a change of a display resolution or a change between from a full screen mode to a zoom-in mode cannot be achieved in the related art LCD device.